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PD-94302B
HEXFET(R) POWER MOSFET SURFACE MOUNT (SMD-1)
IRF5N3205 55V, N-CHANNEL
Product Summary
Part Number
IRF5N3205 BVDSS
55V
RDS(on) ID 0.008 55A*
Fifth Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon unit area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. These devices are well-suited for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse circuits.
SMD-1
Features:
n n n n n n n
Low RDS(on) Avalanche Energy Ratings Dynamic dv/dt Rating Simple Drive Requirements Ease of Paralleling Hermetically Sealed Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current A Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy A Avalanche Current A Repetitive Avalanche Energy A Peak Diode Recovery dv/dt A Operating Junction Storage Temperature Range Package Mounting Surface Temp. Weight * Current is limited by package For footnotes refer to the last page 55* 55* 220 125 1.0 20 140 55 12.5 2.7 -55 to 150 300 (for 5s) 2.6 (Typical)
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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05/17/05
IRF5N3205
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS /T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage g fs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
55 -- -- 2.0 55 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.053 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 -- -- 0.008 4.0 -- 25 250 100 -100 170 32 74 30 300 65 35 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1.0mA VGS = 10V, ID = 55A A VDS = VGS, ID = 250A VDS =15V, IDS = 55A A VDS = 55V ,VGS=0V VDS = 44V, VGS = 0V, TJ =125C VGS =-20V VGS = -20V VGS =10V, ID = 55A VDS = 44V VDD = 27.5V, ID = 55A, VGS = 10V, RG = 2.5
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD l Ciss C oss C rss
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to the center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
3600 1200 435
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD trr QRR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 55* 220 1.3 130 410
Test Conditions
A
V ns nC Tj = 25C, IS = 55A, VGS = 0V A Tj = 25C, IF = 55A, di/dt 100A/s VDD 25V A
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC Junction-to-Case
Min Typ Max
-- -- 1.0
Units
C/W
Test Conditions
Note: Corresponding Spice and Saber models are available on International Rectifier Website. For footnotes refer to the last page
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IRF5N3205
1000
I D , Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
4.5V
4.5V
10
10
1 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 55A
I D , Drain-to-Source Current (A)
1.5
TJ = 25 C TJ = 150 C
100
1.0
0.5
10 4.0
V DS = 25V 15 20s PULSE WIDTH 5.0 6.0 7.0 8.0
VGS, Gate-to-Source Voltage (V)
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRF5N3205
8000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 55A VDS = 44V VDS = 27V VDS = 11V
16
C, Capacitance (pF)
6000
12
4000
Ciss
8
Coss
2000
4
Crss
0 1 10 100
0
FOR TEST CIRCUIT SEE FIGURE 13
0 40 80 120 160 200
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100
TJ = 150 C
ID, Drain-to-Source Current (A)
100
100s
10
TJ = 25 C
1
10 Tc = 25C Tj = 150C Single Pulse 1 10 VDS , Drain-toSource Voltage (V)
1ms
10ms
0.1 0.4
V GS = 0 V
0.8 1.2 1.6
1
VSD ,Source-to-Drain Voltage (V)
100
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRF5N3205
100
V DS
LIMITED BY PACKAGE
RD
V GS RG
80
D.U.T.
+
I D , Drain Current (A)
-V DD
60
VGS
Pulse Width 1 s Duty Factor 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS 90%
0 25 50
TC , Case Temperature ( C)
75
100
125
150
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.001 0.01 0.1 1
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF5N3205
250
EAS , Single Pulse Avalanche Energy (mJ)
15V
200
ID 24.6A 35A BOTTOM 55A TOP
VDS
L
DRIVER
150
RG
D.U.T.
IAS tp
+ V - DD
VGS 20V
A
100
0.01
50
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
10V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRF5N3205
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 25 V, Starting TJ = 25C, L= 0.09mH Peak I AS = 55A, V GS = 10V, RG= 25
ISD 55A, di/dt 217A/s, Pulse width 300 s; Duty Cycle 2%
VDD 55V, TJ 150C
Case Outline and Dimensions -- SMD-1
PAD ASSIGNMENTS
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/2005
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